This invention relates to a lateral insulated gate field effect semiconductor device.
U.S. Pat. No. 4,344,080 describes a lateral insulated gate field effect semiconductor device, comprising a semiconductor body having a first region of one conductivity type adjacent one major surface, second and third regions of the opposite conductivity type provided within the first region adjacent the one major surface and an insulated gate structure overlying a conduction channel region between the second and third regions for providing a gateable connection along the length of the conduction channel region between the second and third regions, the insulated gate structure having a gate insulating region and a gate conductive region extending on the gate insulating region and up onto a relatively thick insulating region adjoining the gate insulating region.
It should be understood that, as used herein, the phrase `lateral insulated gate field effect semiconductor device` means an insulated gate field effect semiconductor device in which the main current flow is along or substantially parallel to the one major surface of the semiconductor body.
The device described in U.S. Pat. No. 4,344,080 is a field effect transistor in which the second and third regions form the source and drain regions, respectively, of the device. In this example, the portion of the third region is a relatively lowly doped drain drift region which is designed so that the number of dopant atoms increases from the gate electrode toward the relatively highly doped portion of the drain region with the aim of increasing the reverse breakdown voltage between the drain and the gate or control electrode without having to resort to stepped insulating layer structures and auxiliary electrodes.
In the device described in U.S. Pat. No.4,344,080 the relatively thick insulating region and an underlying channel stopper region define a window within which the source, drain and drain drift regions and the insulated gate structure are provided. The drain drift region will thus extend at least up to and generally, by virtue of the lateral diffusion of the impurities to form the drain drift region, will overlap with the edge of the window in the relative thick insulating region. Accordingly, in the devices described in U.S. Pat. No. 4,344,080, the drain drift region will thus extend beneath the step in the insulating material where the gate insulating region which covers the window adjoins the relatively thick insulating region.
The present inventors have found that in known lateral insulated gate field effect devices a particularly high electric field stress can exist at the sharp edge or corner where the gate conductive region steps up onto the relatively thick insulating region and that this particularly high electric field stress makes the devices susceptible to breakdown in this region particularly after continuous use or testing at high temperatures.